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Technical Reference Manual

LOW LEVEL PACK ACCESS

Although a deep understanding of the hardware of datapacks and their interface to the Organiser is useful it is not necessary. The operating system software provides all the routines necessary for accessing datapacks while hiding all their complexities from the programmer.

NAMING CONVENTIONS

HARDWARE

USAGE

ORGANISER INTERFACE

NAMING CONVENTIONS

The following conventions are used when referring to lines on the ')"; onMouseout="hideddrivetip()"> EPROM in the datapack and the external datapack connector.

  1. Lines on the ')"; onMouseout="hideddrivetip()"> EPROM are preceded by 'E'.
  2. Lines on the datapack and Organiser connectors are preceded by 'S'.
  3. Lines which are active low (inverted logic) are followed by '_B'.

Hence the chip select line on the ')"; onMouseout="hideddrivetip()"> EPROM is abbreviated ECS_B and the slot select line on the Organiser connector is abbreviated SS_B.

HARDWARE

The following is a selection of the packs available for use on the MKII Organiser:

  • 8k bytes with linear addressing
  • 16k bytes with linear addressing
  • 32k bytes with linear addressing
  • 64k bytes with 256 byte paged addressing
  • 128k bytes and more with 256 byte paged and 16k byte segment addressing

Packs above 64k are not supported in the CM version of the MKII Organiser.

The addressing modes are explained more fully below. Although the same physical connector is used to connect the different types of datapack, the way the individual lines are used varies.

A datapack consists of 2 major components, an ')"; onMouseout="hideddrivetip()"> EPROM and a counter. The ')"; onMouseout="hideddrivetip()"> EPROM is the device where the data is stored and the counter is used to select where in the ')"; onMouseout="hideddrivetip()"> EPROM data is stored and retrieved.

')"; onMouseout="hideddrivetip()"> EPROM (Erasable Programmable Read Only Memory)

')"; onMouseout="hideddrivetip()"> EPROM s are read only memory devices but they can be written to (programmed) and erased under special circumstances. It is worth noting the following important facts about ')"; onMouseout="hideddrivetip()"> EPROM s.

  1. In a blank (erased) ')"; onMouseout="hideddrivetip()"> EPROM all the bytes are equal to $FF (all bits set).
  2. ')"; onMouseout="hideddrivetip()"> EPROM s are erased by subjecting them to ultraviolet light through the quartz window on top of the chip.
  3. Bytes are written by applying a special set of voltages and signals to the ')"; onMouseout="hideddrivetip()"> EPROM .
  4. When writing to an ')"; onMouseout="hideddrivetip()"> EPROM , bits can only be modified from a 1 to a 0.

The ')"; onMouseout="hideddrivetip()"> EPROM s used in datapacks have an 8-bit data bus. The size of their address bus varies from 13 bits for an 8K ')"; onMouseout="hideddrivetip()"> EPROM to 16 bits for a 64K ')"; onMouseout="hideddrivetip()"> EPROM . Other lines that can be present on an ')"; onMouseout="hideddrivetip()"> EPROM are as follows:

NB. Although the names of these lines are similar to those present on the datapack connector there is not necessarily any direct connection between similarly named lines.

Reading from ')"; onMouseout="hideddrivetip()"> EPROM

In general to read from an ')"; onMouseout="hideddrivetip()"> EPROM the following procedure must be followed.

  1. Set up the required address on the ')"; onMouseout="hideddrivetip()"> EPROM
  2. Set EOE_B low
  3. Set ECS_B low
  4. Read data on the data bus
  5. Set ECS_B high
  6. Set EOE_B high

The configuration of EVPP and EPGM_B is dependent on the type of ')"; onMouseout="hideddrivetip()"> EPROM but does not change during the read cycle.

Writing to ')"; onMouseout="hideddrivetip()"> EPROM

In an erased or blank ')"; onMouseout="hideddrivetip()"> EPROM all the bytes are $FF, i.e. all bits are 1. To write to an ')"; onMouseout="hideddrivetip()"> EPROM the relevant bits are "blown" from ones to zeroes.

So to write a $3 to the ')"; onMouseout="hideddrivetip()"> EPROM a $3 is latched on the data bus and the relevant programming pulses applied to the ')"; onMouseout="hideddrivetip()"> EPROM . This causes the ')"; onMouseout="hideddrivetip()"> EPROM to AND the current contents with $3 and store the result back into the ')"; onMouseout="hideddrivetip()"> EPROM .

If the ')"; onMouseout="hideddrivetip()"> EPROM was blank then the byte blown will be ($3 AND $FF) = $3. If, however, the ')"; onMouseout="hideddrivetip()"> EPROM was not blank and, say, the byte $81 was previously stored in the ')"; onMouseout="hideddrivetip()"> EPROM then the byte blown will be ($3 AND $81) = $1.

This can be used to advantage for writing headers on packs. If a valid record header is $81 then at a later date this can be "blown" down to $1 to indicate an erased record.

The algorithm for writing to ')"; onMouseout="hideddrivetip()"> EPROM s varies depending on the type of the ')"; onMouseout="hideddrivetip()"> EPROM . The following is an example of one algorithm to write to an 8k or 16k ')"; onMouseout="hideddrivetip()"> EPROM . The algorithm used by the operating system is not described here because of its complexity in handling the many different types of ')"; onMouseout="hideddrivetip()"> EPROM .

  1. Set up the required address on the ')"; onMouseout="hideddrivetip()"> EPROM
  2. Set EOE_B high
  3. Raise EVPP to the required voltage (21V for 8k or 16k ')"; onMouseout="hideddrivetip()"> EPROM type)
  4. Latch data onto the data bus
  5. Set ECS_B low
  6. Set EPGM_B low
  7. Wait for 50 ms
  8. Set EPGM_B high
  9. Set the data bus to input
  10. Set EOE_B low
  11. Read back data and verify. If it is not the same as the programmed data then programming has failed (possibly due to non erased or faulty ')"; onMouseout="hideddrivetip()"> EPROM ).
  12. Set EOE_B high
  13. Set ECS_B high
  14. Lower EVPP to 5v

ADDRESSING MODES

To address an 8k byte ')"; onMouseout="hideddrivetip()"> EPROM 13 address lines are required, while a 16k byte ')"; onMouseout="hideddrivetip()"> EPROM requires 14 a 32k byte ')"; onMouseout="hideddrivetip()"> EPROM needs 15 address lines.

Hence to connect an 8k byte ')"; onMouseout="hideddrivetip()"> EPROM to be directly addressable a 27-way connector would be required consisting of the following:

  1. 13 address lines
  2. 8 data lines
  3. 4 control lines (CS,OE,VPP,PGM)
  4. 2 power supply lines (5V and 0V)

To connect a 32k byte ')"; onMouseout="hideddrivetip()"> EPROM to be directly addressable a 28-way connector would be required consisting of the following:

  1. 15 address lines
  2. 8 data lines
  3. 3 control lines (CS,OE,VPP)
  4. 2 power supply lines (5V and 0V)
Linearly Addressed Datapacks

To cut down the size of connector and to provide a more consistent interface a counter has been connected to the address lines (A1 upwards) of the ')"; onMouseout="hideddrivetip()"> EPROM . The counter is then interfaced to via only 2 or 3 control lines (depending on the ')"; onMouseout="hideddrivetip()"> EPROM type). On an 8k datapack there are 2 control lines connected to the counter:

  1. Master Reset (abbreviated SMR). When this line is high the counters are reset. Also if the clock line is low (see below) this results in an address of zero on the ')"; onMouseout="hideddrivetip()"> EPROM .
  2. Clock (abbreviated SCLK). This line has a dual function

Thus to set the address on the ')"; onMouseout="hideddrivetip()"> EPROM to zero SCLK should be set low and MR should be pulsed high. To then set address $1 SCLK should be set high. To then set the address to $2 SCLK should be set low again, and so on. To set the address $100 on the ')"; onMouseout="hideddrivetip()"> EPROM SMR should be pulsed high and then SCLK toggled 256 times. The counter is set up to "wrap around" the size of the pack- i.e. counting to address 8192 on an 8k pack will leave it set at address 0. This sort of pack is addressed linearly and is referred to as a linearly address datapack.

Page Counted Datapacks

Obviously accessing higher addresses in the ')"; onMouseout="hideddrivetip()"> EPROM this way increases the access time. To access the last byte of a 8k datapack SCLK must be toggled 8191 times. To decrease the access time on larger packs (32k bytes and larger) a 256 byte page counter has been introduced. This line is called SPGM_B. SPGM_B is used when writing to (programming) 8k and 16k datapacks.

On these page counted packs there are 2 counters:

  1. This counter is connected to address lines A1 to A7 on the ')"; onMouseout="hideddrivetip()"> EPROM and is incremented by SCLK as described above.
  2. This counter is connected to address lines A8 to A15 (depending on the ')"; onMouseout="hideddrivetip()"> EPROM size) and is incremented by bringing SPGM_B from a high state to a low state. (Going from low to high has no effect).

Both counters are reset to zero by pulsing SMR high.

To set an address on the ')"; onMouseout="hideddrivetip()"> EPROM to $100 on a page counted pack SCLK is set low, SMR is pulsed high and then SPGM_B is pulsed high.

To access the last byte of a 32k byte datapack SPGM_B must be pulsed 127 times and then SCLK must be toggled 255 times.

Both counters on a paged pack "wrap around". The counter incremented by SCLK wraps around $100 bytes, i.e. toggling SCLK $100 times will not change the address on the ')"; onMouseout="hideddrivetip()"> EPROM . The page counter wraps around the size of the pack, i.e. pulsing SPGM_B 128 times will not change the address on a 32k ')"; onMouseout="hideddrivetip()"> EPROM .

This sort of pack is referred to as a "page counted" or "paged" pack. Both linear and paged 32k datapacks have been produced.

Segmented Datapacks

A 128k byte ')"; onMouseout="hideddrivetip()"> EPROM would normally require 17 address lines which would make it physically too large to fit inside a datapack. However a version of a 128k byte ')"; onMouseout="hideddrivetip()"> EPROM is made which consists of 8 x 16k byte segments. The ')"; onMouseout="hideddrivetip()"> EPROM is addressed as a normal 16k byte ')"; onMouseout="hideddrivetip()"> EPROM with 14 address lines. Inside the ')"; onMouseout="hideddrivetip()"> EPROM there is a segment register which you can write to via the data bus by setting up a special condition on the control lines.

To write to the segment register the ')"; onMouseout="hideddrivetip()"> EPROM must be selected and its outputs disabled. To do this, the lines SOE_B (output enable) and SS_B (slot select) must be used.

The following procedure must be followed to write to the segment register:

  1. Set SMR high
  2. Set SOE_B high
  3. Set SPGM_B Low
  4. Make sure SVPP is set to 5V
  5. Output segment number on data bus
  6. Set SS_B low
  7. Set SS_B high
  8. Set SMR low

To access the last byte of a 128k byte datapack 7 must be written to the segment register, SPGM_B must be pulsed 63 times and then SCLK must be toggled 255 times. On a 128k pack only the bottom 3 bits of the segment address are used; the top 5 bits are ignored. Writing an 8 to the segment register of a 128k ')"; onMouseout="hideddrivetip()"> EPROM datapack is the same as writing a 0.

RAMPACKS

Rampacks are packs that have RAM rather than ')"; onMouseout="hideddrivetip()"> EPROM as their storage medium. This has advantages and disadvantages:

The 32k rampack is a paged datapack and has a hardware ID byte of 1.

128k datapacks also have page counters so they are "page counted, segmented packs".

All datapack handling routines in the operating system will handle 32k and 64k paged rampacks and 128k (and more) segmented paged rampacks. The CM operating system does not handle rampacks.

USAGE

8K AND 16K DATAPACKS

All 8K and 16k datapacks are linearly addressed datapacks.

The following conditions are required to access 8k and 16k datapacks:

READING

  • SCLK Don't care (either high or low)
  • SMR low
  • SVPP 5v
  • SOE_B low
  • SPGM_B high
  • SS_B low

WRITING

  • SCLK Don't care (either high or low)
  • SMR low
  • SVPP 21v
  • SOE_B high
  • SPGM_B low
  • SS_B low

32K DATAPACKS

Both linearly addressable and paged 32k datapacks are produced.

The following conditions are required to access 32k linearly addressed datapacks:

READING

  • SCLK Don't care (either high or low)
  • SMR low
  • SVPP 5v
  • SOE_B low
  • SS_B low

WRITING

  • SCLK Don't care (either high or low)
  • SMR low
  • SVPP 21v
  • SOE_B high
  • SS_B low

The following conditions are required to access 32k paged datapacks:

READING

  • SCLK Don't care (either high or low).
  • SMR low SVPP 5v
  • SOE_B low
  • SS_B low

WRITING

  • SCLK Don't care
  • SMR low
  • SVPP 21v
  • SOE_B high
  • SS_B low

64K DATAPACKS

The majority of 64k datapacks produced have been paged however a small number of linearly addressed 64k packs were produced.

The following conditions are required to access 64k paged datapacks:

READING

  • SCLK Don't care
  • SPGM_B high
  • SMR low
  • SVPP 5v
  • SOE_B low
  • SS_B low

WRITING

  • SCLK Don't care
  • SPGM_B low
  • SMR low
  • SVPP 21v
  • SOE_B high
  • SS_B low

128K AND BIGGER DATAPACKS

All 128k datapacks are segmented and paged.

The following conditions are required to access 128k datapacks:

READING

  • SCLK Don't care
  • SPGM_B Don't care
  • SMR low
  • SVPP 5v
  • SOE_B low
  • SS_B low

WRITING

  • SCLK Don't care
  • SPGM_B Don't care
  • SMR low
  • SVPP 21v
  • SOE_B high
  • SS_B low

32k, 64k, 128k AND BIGGER RAMPACKS

All 32k and 64k rampacks are paged.

All 128k and bigger rampacks are segmented and paged.

The following conditions are required to access rampacks:

READING

  • SCLK Don't care
  • SPGM_B Don't care
  • SVPP Don't care (5v recommended)
  • SMR low
  • SOE_B low
  • SS_B low

WRITING

  • SCLK Don't care. (either high or low)
  • SPGM_B Don't care
  • SVPP Don't care (5V recommended)
  • SMR low
  • SOE_B high
  • SS_B low

ORGANISER INTERFACE

The Organiser has three interface slots; one top slot and two datapack slots. This section describes the two datapack slots.

The top slot is very similar to the two datapack slots but has some unique features. It is described separately in chapter External Interfacing.

ORGANISER SIDE SLOT CONNECTOR

There are sixteen lines on the Organiser side slot connector, as follows:

SD0 - SD7 Data bus
SMR Master Reset
SCLK Clock
SOE_B Output Enable
SS_B Slot Select
Gnd 0v
SPGM_B Program
SVCC 5v
SVPP Program Voltage

These are the same as the datapack connector.

PROCESSOR INTERFACE

The ports on the 6303 and the I/O addresses that are associated with the datapack interface are as follows:

  • PORT 2 (POB_PORT2, address $3, data direction register $1). This 8-bit bi-directional port is used as the data bus to all the datapack slots (including the Top slot). When no pack is plugged in this data bus will read zero. 
  • PORT 6 (POB_PORT6, address $17, data direction register $16). This 8-bit bi-directional port is used for the control lines. All lines are defined as outputs when in use and inputs when not in use. When this port is set to all inputs the slots are powered down and deselected.
    bit 0 SCLK Clock line to the datapack slots
    bit 1 SMR Master reset line
    bit 2 SPGM_B Program line
    bit 3 SOE_B Output Enable line. When this line and SS_B are low the ')"; onMouseout="hideddrivetip()"> EPROM s outputs are active and it is possible to read from the ')"; onMouseout="hideddrivetip()"> EPROM . SOE_B set high enables SVPP to be switched to 21V (see also SCA_ALARMHIGH).
    bit 4 SS1_B Chip select line for slot 1. Selects slot 1 when low.
    Bit 5 SS2_B Chip select line for slot 2. Selects slot 2 when low.
    Bit 6 SS3_B Chip select line for the top slot. Selects top slot when low.
    Bit 7 PACON_B When this line is low the slots are powered up by setting VCC to 5V. When this line is high all the slots are powered down.
  • SCA_PULSEENABLE ($200): Enables generation of 21V
  • SCA_PULSEDISABLE ($240): Disables generation of 21V
  • SCA_ALARMHIGH ($280): Enables SVPP to be switched to 21V. Also used for sound generation (key click, beep etc.).
  • SCA_ALARMLOW ($2C0): Disables SVPP being switched to 21V. Also used for sound generation with SCA_ALARMLOW.
  • PORT 5 (POB_PORT5, address $15): Only bit 1 (ACOUT) of this port is associated with the datapack interface. When this bit is high this indicates the 21V is ready to be switched on to the packs.

NB. Port 2 can also be used for serial communications. Bit 2 of this port is used for external clock input. To enable this bit to be used as an output $4 must be stored in the Rate/Mode Control Register (RMCR, address $10). If this is not done Bit 2 of port 2 will remain an input irrespective of what is in the data direction register. For further details see page 50 of Hitachi's HD6301X-HD6303X Family Users Manual. On reset zero is stored in the RMCR.

The following equalities are assumed in the machine code examples:

         SCLK           =0 
         SMR            =1 
         SPGM           =2 
         SOE_B          =3 
         SS1_B          =4 
         SS2_B          =5 
         SS3_B          =6 
         PACON_B        =7
Powering up the Slots

The 5v supply (SVCC) and program voltage supply (SVPP) to the slots are switchable by software. These supplies are common to all the slots.

The slots are powered up by setting PACON_B low. This sets SVCC and SVPP to 5V.

After powering up the slots there should be a delay of at least 50ms to allow the power to settle. During this delay all lines of port 6, except PACON_B, should be set to inputs. The slots should be powered down whenever possible to reduce power consumption. Setting SVPP to 21V is described below.

The following example powers up the slots.

; Make port 6 an input. This powers down the slots and deselects them.
; This should have been done immediately after the slots were last used.
        CLR     POB_DDR6
;
; Make port 2 inputs. Port 2 (pack data bus) should always be left inputs.
        CLR     POB_DDR2
; Initialize port 6 so it has the correct data when it is made an output.
; Make SS1_B=SS2_B=SS3_B=1,SMR=SCLK=PACON_B=SOE_B=0,SPGM_B=1
        LDA     A,#$74
        STA     A,POB_PORT6:
; Make PACON_B of port 6 an output, powers up slots
        LDA     A,#$80
        STA     A,POB_DDR6:
; Wait for power to settle
        LDX     #11520                  ; 50 ms delay
1$:
        DEX
        BNE     1$
; Make rest of port 6 outputs now the slots are on
        LDA     A,#$FF
        STA     A,POB_DDR6:
; The slots are now powered up, but none are yet selected.
Selecting a Datapack Slot

As can been seen from the above diagram the datapack data bus (SD0-